Why load capacitance matters
A quartz crystal oscillates at its marked frequency only when it sees the load capacitance CL written on its datasheet, commonly 8, 12, 18 or 20 pF. In the usual Pierce oscillator, two capacitors C1 and C2 go from each crystal pin to ground. The crystal sees them in series, plus the stray capacitance of the PCB traces and the chip’s pins:
CL = (C1 × C2) ÷ (C1 + C2) + C_stray
With equal capacitors, C1 = C2 = 2 × (CL − C_stray).
Example
An 18 pF crystal on a board with about 5 pF of stray capacitance needs 2 × (18 − 5) = 26 pF on each pin. The nearest standard value is 27 pF, which gives 27 ÷ 2 + 5 = 18.5 pF of load.
How far the frequency moves
A load different from CL “pulls” the frequency. With the crystal’s motional capacitance C1 (a few femtofarads) and shunt capacitance C0 (a few picofarads):
Δf ÷ f ≈ (C1 ÷ 2) × (1 ÷ (C0 + CL_actual) − 1 ÷ (C0 + CL_spec))
With C1 = 15 fF and C0 = 5 pF, the extra 0.5 pF lowers the frequency by about 7 ppm. Too much capacitance makes the crystal slow; too little makes it fast.
Typical tolerances
| Application | Usual requirement |
|---|---|
| UART | Under about ±1% (10,000 ppm), very easy |
| USB full speed | ±2,500 ppm |
| Ethernet | ±50 ppm |
| Bluetooth Low Energy | ±50 ppm or tighter |
| 32.768 kHz watch crystal | ±20 ppm is about 1 minute per month |
Practical advice
- Stray capacitance is usually 2 to 5 pF. Measure the actual frequency on a prototype and adjust.
- Do not simply use the CL value itself for each capacitor: that doubles the effective load error.
- Too-large capacitors also reduce the oscillator’s gain margin and can stop low-power oscillators from starting, especially 32.768 kHz crystals.
- Keep crystal traces short, avoid routing signals under the crystal, and place the capacitors close to the pins.